Billionaire Elon Musk: How I Became The Real 'Iron Man'

Hey there~

Here is another inspiring video that I going to share with you guys.

Elon Musk is well known as a risk-taking and young entrepreneur.

To become successful, it is always good to learn from the successful one. Elon Musk is one of the prefect example that I think we can learn from.

From this video clip, I learn that one should bear all the pains along the path to success. I respect Elon Musk's vision that one day he want to change the course of the world and clearly he is doing just right. 3 companies that he own are changing the lifestyle of US people and soon the world. He believe in himself and willing to take risks to achieve his dream.

But he is a human too, his success doesn't make him any more than us. He doesn't foresee the future, instead he building his own future by vision, plan, intelligent and action. I believe risk-taking is a must to success, who afraid of changes and only willing to stay at the comfort zone can't do any good.

In the end, I would like to say is that: Don't believe in taking the right decisions, however do take decisions and make them right! Enjoy the video!

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GoPro: Fireman Saves Kitten

What an inspiring short video clip!

Life is the most important asset that we everybody own in this world, saving a life means a lot, sometimes a small move can change one's world. 

Let's get out there and do good to people, even a kitten is a life with feeling and emotion that we ought to help! 

Salute to the fireman!

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Quartus II: XOR gate using verilog design

Sup,

After learning the basic functions of Quartus II, we are going to learn to design a digital system using verilog design.

In our example, we are going to use design an XOR gate. 

First, we have to know the inputs and outputs of our XOR gate. In this case, our inputs are X and Y, our output is Z.

After that, we have to obtain the boolean expression, as shown above. 

Now let us start designing using Quartus II. Create a new project and make sure to remember the name of our project. We need to use the same name for our top level module later on.

Shown above is the code of our XOR gate. Everything contained in between 'module' and 'endmodule' is called a module. And 'xorgate' is the name of this module. Note that it is the same as our project name as mentioned earlier.

Every inputs and outputs variable in this module must be declared as shown above. 

Declaring x and y as inputs.

Declaring z as output.

Writing the boolean expression of our XOR gate. The ^ symbol is the symbol for exclusive OR.

Simulating our circuit, we get the waveform above which corresponds to our truth table.

That's all for today, we'll continue in the next post with another example.

Peace out.

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Fundamentals of Digital Logic with Verilog Design-Third edition ebook

Sup,

this is an ebook on digital system design using verilog. 

Click on the download link below to download.

Download

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EMT: 3rd week part 1 Electric Field Intensity of a finite and infinite surface of charges

Hey there,

Today we learn about the Electric Field Intensity of a finite and infinite surface of charges. 

Coulomb's law still applied in this topic, but dQ will be different.    (2 variables). 

Since we already learn about Coulomb's law, lets straight get into one of the example to have a quick but better understanding on this.

Example:

A circular disk of radius a is uniformly charged with ps C/m2. If the disk lies on the z = 0 plane with its axis along the z-axis,

(a) Show that at point (0, 0, h)

(b) From this, derive the E field due to an infinite sheet of charge on the z = 0 plane.

Solution

(a)

The question stated that the unit of ps is C/m2, which means that it is a surface charges question. 

So the answer is already given, all we need to do is to prove it.

Please try to read the solution below carefully:

the only different here is dQ = rdrdphi. So, double integration is required to complete this question instead of only one integration needed when dealing with line charges.

Since we dealing with circular disc with constant density, we assume that vector r will eventually been all cancelled out, so only magnitude with z is existed.

(b) As a approaching infinity,  the equation we obtained in (a) can be further reduced.

Hope you guys can understand surface charges concept with this example!

See ya!

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Functional Simulation of Verilog Code in Altera Quartus II - XOR gate

Hey there~

If you still having trouble with Altera Quartus II, this short video that I found on the internet is extremely useful. Just watch the video carefully and follows the steps. 

This is a simple video on building a XOR gate and obtain the waveform by using vector waveform plot. 

Happy Trying!

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Quartus II: Basic Tutorial

Sup,

this is going to be a starter guide on how to use Quartus II. 

1. First, go to File > New Project Wizard

2. Choose a directory and a name for the project, then click Next.

3. Click Next

4. Choose 'Cyclone II' as family, then choose EP2C35F672C6 as device. We can also choose 'Auto device selected by the filer'.

5. Click Next

6. Click Finish and we have created our project file.

7. We need a text editor to start editing our code. Click File > New, choose Verilog HDL File and click OK.

8. We need to first save our file. Go to File > Save As. Use the name of our project as the file name. Click Save.

For our purpose, we are going to use the above example. It is a simple two-way light switch. The truth table for every input is as shown.

9. Input the code above into the text editor. Don't worry about the code, we are going to go over it later on.

10. Now we are going to compile our code. Go to Processing > Start Compilation or click the button shown above.

11. A successful compilation will look like the picture above.

12. Now, we will want to simulate our design by using a waveform editor. Click File > New, choose 'Vector Waveform File' then click OK.

13. Save the waveform file first, again the same name as our project.

14. Go to Edit > End Time, set the time to 200ns, then click OK.

15. Select View > Fit In Window to fit the entire time range into our screen.

16. Now, we want to include out inputs and output. Click Edit > Insert > Insert Node or Bus. Then click Node Finder.

17. Change the filter to Pins: unassigned, click List, the inputs and outputs will appear on the left hand column. Click the arrow sign to add them to the right hand column. Click OK.

The waveform of the inputs and output will appear, but we still have to edit the inputs before we start our simulation.

18. Click the 'Waveform Editing Tool' icon. Click and drag to select a section of the waveform. Then choose the logic '1' or '0'.

All is set and we are going to simulate our design.

19. But before that, we need to set the simulation mode. Go to Assignment > Settings, click 'Simulator setting', then change simulation mode to 'Functional'. Click OK.

20. After that, click Processing > Generate Functional Simulation Netlist.

21. Go to Processing > Start Simulation, or click on the icon shown above.

22. Lastly, click View > Fit in Window again to view the entire range of our waveform. There we go. The waveform will corresponds to the truth table earlier.

Peace out.

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