Quartus II: XOR gate using verilog design

By: Unknown on Wednesday, March 11, 2015

Sup,

After learning the basic functions of Quartus II, we are going to learn to design a digital system using verilog design.

In our example, we are going to use design an XOR gate. 

First, we have to know the inputs and outputs of our XOR gate. In this case, our inputs are X and Y, our output is Z.

After that, we have to obtain the boolean expression, as shown above. 

Now let us start designing using Quartus II. Create a new project and make sure to remember the name of our project. We need to use the same name for our top level module later on.

Shown above is the code of our XOR gate. Everything contained in between 'module' and 'endmodule' is called a module. And 'xorgate' is the name of this module. Note that it is the same as our project name as mentioned earlier.

Every inputs and outputs variable in this module must be declared as shown above. 

Declaring x and y as inputs.

Declaring z as output.

Writing the boolean expression of our XOR gate. The ^ symbol is the symbol for exclusive OR.

Simulating our circuit, we get the waveform above which corresponds to our truth table.

That's all for today, we'll continue in the next post with another example.

Peace out.